Test design compilers complement top down ASIC design

To help the test engineer and the ASIC designer implement testable designs, a set of design tools, known as Test Design Compilers, have been developed to complement a top down design approach. These tools allow test functions to be incorporated and simulated in the earliest design specifications while requiring a minimal effort by the designer. The test compilers generate synthesizable behavioral models that can then be ported to a number of simulation and synthesis environments via the VHSIC Hardware Description Language (VHDL). This paper describes the test compilers that have been developed and implemented into a top down ASIC design environment. The design environment is described, along with the top down approach being used. Next, the test compilers are described along with example applications of the test produced by the compilers