Practical Aspects Of Development Of Embedded Systems With RTCP-nets And Adder Tools

Author

Szpyrka, M.

Author_Institution

AGH Univ. of Sci. & Technol., Krakow

fYear

2006

fDate

22-24 June 2006

Firstpage

722

Lastpage

727

Abstract

Using of formal methods at different stages in the embedded system development process may both increase the quality of developed software and reduce the cost of its testing and the debugging. However, formal methods are not widely used in industrial software development. Such a situation could be treated as a result of a lack of suitable tools for fast designing of models and its automatic verification. The presented approach is based on a class of Petri nets called RTCP-nets. The paper focuses on computer tools, that are being developed at AGH University of Science and Technology in Krakow, that support the design and verification of hierarchical RTCP-nets models. A short description of hierarchical RTCP-nets and a survey of main software features are presented in the paper

Keywords

Petri nets; adders; embedded systems; formal specification; program debugging; program testing; Petri nets; RTCP-nets; adder tools; automatic verification; computer tools; debugging cost; developed software quality; embedded systems; formal methods; industrial software development; testing cost; Computer industry; Costs; Embedded software; Embedded system; Petri nets; Programming; Software debugging; Software quality; Software testing; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference

Conference_Location

Gdynia

Print_ISBN

83-922632-2-7

Type

conf

DOI

10.1109/MIXDES.2006.1706679

Filename

1706679