DocumentCode
2640319
Title
Integrating circuit design and formal verification
Author
Pate, Vishank ; Offen, Ray
Author_Institution
Dept. of Electron. & Electr. Eng., Univ. Coll., London, UK
fYear
1990
fDate
1-3 May 1990
Firstpage
2244
Abstract
The application of formal methods to the specification and design derivation of integrated circuits is addressed. The initial specification is expressed as an abstract relation between data tuples. This relation is a combination of conditional statements and associated data actions. Structural circuit descriptions are derived by step-wise application of proven laws to the specification while maintaining behavioral equivalence. This yields designs that are correct by construction. An example of a simple microprocessor design is used to illustrate the method
Keywords
circuit CAD; integrated circuit technology; CAD; IC design; formal verification; integrated circuits; microprocessor design; structural circuit descriptions; Application specific integrated circuits; Circuit synthesis; Design methodology; Educational institutions; Fabrication; Formal verification; Integrated circuit technology; Integrated circuit yield; Microprocessors; Process design;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112337
Filename
112337
Link To Document