DocumentCode
2640353
Title
An Efficient Algorithm for Online Management of 2D Area of Partially Reconfigurable FPGAs
Author
Cui, Jin ; Deng, Qingxu ; He, Xiuqiang ; Gu, Zonghua
Author_Institution
Dept. of Comput. Sci., Northeastern Univ., Shenyang
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
Partially runtime-reconfigurable (PRTR) FPGAs allow hardware tasks to be placed and removed dynamically at runtime. We present an efficient algorithm for finding the complete set of maximal empty rectangles on a 2D PRTR FPGA, which is useful for online placement and scheduling of HW tasks. The algorithm is incremental and only updates the local region affected by each task addition or removal event. We use simulation experiments to evaluate its performance and compare to related work
Keywords
field programmable gate arrays; logic CAD; reconfigurable architectures; 2D PRTR FPGA; HW tasks; hardware tasks; online management; online placement; partially runtime-reconfigurable FPGA; Computer science; Engineering management; Field programmable gate arrays; Hardware; Helium; Operating systems; Recycling; Runtime; Scheduling algorithm; Technology management;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364579
Filename
4211784
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