DocumentCode
2640648
Title
Practical synthesis of speed-independent circuits using unfoldings
Author
Kim, Uisok ; Lee, Dong-Ik
Author_Institution
Dept. of Inf. & Commun., K-JIST, Kwangju, South Korea
fYear
1998
fDate
10-13 Feb 1998
Firstpage
191
Lastpage
196
Abstract
In this paper, we present a practical synthesis method using unfoldings which are based on partial order semantics and hence free of state space explosion inherently. In addition, we suggest several conditions for basic gate implementation in order to enhance practicality of the suggested method
Keywords
logic design; state-space methods; partial order semantics; speed-independent circuits synthesis; state space explosion; unfoldings; Circuit synthesis; Concurrent computing; Design methodology; Explosions; Hazards; Libraries; Logic circuits; Petri nets; Signal synthesis; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
0-7803-4425-1
Type
conf
DOI
10.1109/ASPDAC.1998.669442
Filename
669442
Link To Document