DocumentCode
2640659
Title
Microprocessors in the Era of Terascale Integration
Author
Borkar, Shekhar ; Jouppi, Norman P. ; Stenstrom, Per
Author_Institution
Intel Corp., Hillsboro, OR
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
Moore´s law has deliver tera-scale level transistor integration capacity. Power, variability, reliability, aging, and testing are pose as barriers and challenges to harness this integration capacity. Advances in microarchitecture and programming systems discussed in this paper are potential solutions
Keywords
integrated circuit reliability; logic testing; microprocessor chips; Moore´s law; microarchitecture systems; microprocessors; programming systems; terascale level transistor integration capacity; Dielectrics; Error correction codes; Logic; Microarchitecture; Microprocessors; Moore´s Law; Single event upset; Testing; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364597
Filename
4211802
Link To Document