• DocumentCode
    2640762
  • Title

    Tackling an Abstraction Gap: Co-simulating SystemC DE with Bluespec ESL

  • Author

    Patel, Hiren D. ; Shukla, Sandeep K.

  • Author_Institution
    Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ.
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    The growing SystemC community for system level design exploration is a result of SystemC´s capability of modeling at RTL and above RTL abstraction levels. However, managing shared state concurrency using multi-threading in large SystemC models is error prone. A recent extension of SystemC called Bluespec-SystemC (BS-ESL) counters this difficulty with its model of computation employing atomic rule-based specifications. However, for simulating a model that is partly designed in SystemC and partly using BS-ESL, an interoperability semantics and implementation of such a semantic is required. This paper views the interoperability problem as an abstraction gap closure problem. To illustrate the problem, the simulation semantics of BS-ESL and discrete-event simulation of RTL SystemC were formalized and provide a solution based on this formalization
  • Keywords
    electronic engineering computing; hardware description languages; logic design; Bluespec ESL; Bluespec-SystemC; SystemC DE; abstraction gap closure problem; atomic rule-based specifications; discrete-event simulation; register transfer level; simulation semantics; Computational modeling; Computer errors; Concurrent computing; Counting circuits; Discrete event simulation; Hardware design languages; High level synthesis; Impedance; Job shop scheduling; System-level design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364604
  • Filename
    4211809