A CMOS highly linear low-noise amplifier for Digital TV applications

Author

Bae, Jeong-Yeol ; Kim, Suna ; Lee, In-Young ; Cartwright, Justin ; Lee, Sang-Gug

Author_Institution

Dept. of Electr. Eng., KAIST, Daejeon, South Korea

fYear

2012

fDate

17-19 June 2012

Firstpage

21

Lastpage

24

Abstract

This paper presents a highly linear low-noise amplifier (LNA) for Digital TV applications. By including a second-order nonlinear cancelling transistor to the noise cancelling circuit, the proposed LNA achieves high IIP₃ which is immune to the offset frequency of two tone signals. The proposed LNA is implemented as a differential architecture in 0.13 μm CMOS technology, and measurements show +17.8 dBm, 12.4 dB and 1.6 dB of IIP₃, gain and NF, respectively, while drawing 18.45 mA from 1.2 V.

Keywords

CMOS analogue integrated circuits; digital television; low noise amplifiers; CMOS highly linear low-noise amplifier; LNA; current 18.45 mA; differential architecture; digital TV applications; gain 12.4 dB; noise cancelling circuit; noise figure 1.6 dB; offset frequency; second-order nonlinear cancelling transistor; size 0.13 mum; tone signals; voltage 1.2 V; CMOS integrated circuits; CMOS technology; Nonlinear cancellation; Wide-band; low-noise amplifier (LNA); noise cancelling; resistive shunt feedback;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE

Conference_Location

Montreal, QC

ISSN

1529-2517

Print_ISBN

978-1-4673-0413-9

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2012.6242223

Filename

6242223