DocumentCode :
2642003
Title :
Harmonic rejection mixer at ADC input for complex IF dual carrier receiver architecture
Author :
Sundström, L. ; Anderson, M. ; Andersson, M. ; Andreani, Pietro
Author_Institution :
Ericsson Res., Ericsson AB, Lund, Sweden
fYear :
2012
fDate :
17-19 June 2012
Firstpage :
265
Lastpage :
268
Abstract :
This paper presents a receiver architecture for intra-band dual-carrier reception as specified for the upcoming releases of 3GPP HSPA and LTE standards. It is based on a time-discrete harmonic rejection complex-IF mixer to limit the bandwidth requirements on the ADCs to that of a single carrier. The mixer has been designed and fabricated together with a 3rd order continuous-time ΔΣ-ADC for proof-of-concept evaluation. Measurements show at least 68dB rejection at 2nd to 4th LO harmonic.
Keywords :
3G mobile communication; Long Term Evolution; access protocols; analogue-digital conversion; harmonic distortion; mixers (circuits); network synthesis; radio receivers; radio reception; 3GPP HSPA standards; ADC input; LTE standards; bandwidth requirements; complex IF dual carrier receiver architecture; intraband dual-carrier reception; mixer design; proof-of-concept evaluation; receiver architecture; third order continuous-time ΔΣ-ADC; time-discrete harmonic rejection complex-IF mixer; Bandwidth; Clocks; Harmonic analysis; Mixers; Power harmonic filters; Receivers; Receivers; mixed analog digital integrated circuits; mixers; switched circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE
Conference_Location :
Montreal, QC
ISSN :
1529-2517
Print_ISBN :
978-1-4673-0413-9
Electronic_ISBN :
1529-2517
Type :
conf
DOI :
10.1109/RFIC.2012.6242278
Filename :
6242278
Link To Document :
بازگشت