Design issues in field programmable gate arrays (FPGAs)

Author

Abd-El-Barr, Mostafa ; Vranesic, Zvonko

Author_Institution

Dept. of Electr. & Comput. Eng., Kuwait Univ., Safat, Kuwait

fYear

1999

fDate

22-24 Nov. 1999

Firstpage

169

Lastpage

172

Abstract

In this paper, we present some of the important design factors and performance issues in the development of field programmable gate arrays (FPGAs). Emphasis is placed on the design of logic blocks and interconnection resources. We also discuss the possibility of using multiple-valued logic in the design of FPGA logic blocks.

Keywords

field programmable gate arrays; logic design; multivalued logic; FPGA; FPGA logic block design; design factors; field programmable gate arrays; interconnection resource design; logic block design; multiple-valued logic; performance issues; Field programmable gate arrays; Integrated circuit interconnections; Logic arrays; Logic design; Logic devices; Logic programming; Programmable logic arrays; Switches; Table lookup; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 1999. ICM '99. The Eleventh International Conference on

Print_ISBN

0-7803-6643-3

Type

conf

DOI

10.1109/ICM.2000.884832

Filename

884832

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2642111