DocumentCode
2643619
Title
An efficient FPGA design of RNS core function extractor
Author
Zhang, Wei ; Siy, Pepe
Author_Institution
Dept. of Electr. & Comput. Eng., Wayne State Univ., Detroit, MI, USA
fYear
2005
fDate
26-28 June 2005
Firstpage
722
Lastpage
724
Abstract
The core function provides an efficient way to solve difficult residue number system (RNS) operations. The critical core may cause ambiguity during core function extraction. In this paper, an efficient FPGA design of core function extractor is presented which can form the basis for solving the difficult RNS operations.
Keywords
field programmable gate arrays; residue number systems; FPGA design; core function extraction; residue number system; Bismuth; Digital signal processing; Dynamic range; Field programmable gate arrays; Hardware; Parallel processing; Read only memory; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Fuzzy Information Processing Society, 2005. NAFIPS 2005. Annual Meeting of the North American
Print_ISBN
0-7803-9187-X
Type
conf
DOI
10.1109/NAFIPS.2005.1548627
Filename
1548627
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