DocumentCode
2643815
Title
III–V field effect transistors for future ultra-low power applications
Author
Dewey, G. ; Chu-Kung, B. ; Kotlyar, R. ; Metz, M. ; Mukherjee, N. ; Radosavljevic, M.
Author_Institution
Components Res., Intel Corp., Hillsboro, OR, USA
fYear
2012
fDate
12-14 June 2012
Firstpage
45
Lastpage
46
Abstract
This paper summarizes the electrostatics and performance of III-V field effect transistors including thin body planar MOSFETs, 3-D tri-gate MOSFETs, and Tunneling FETs (TFETs). The electrostatics of the III-V devices is shown to improve from thick body planar to thin body planar and then to 3-D tri-gate. Beyond the MOSFET structures, sub-threshold slope (SS) steeper than 60 mV/decade has been demonstrated in III-V TFETs. These III-V devices, especially the 3-D tri-gate MOSFET and TFET, are viable options for future ultra low power applications.
Keywords
III-V semiconductors; MOSFET; electrostatics; low-power electronics; tunnel transistors; 3D trigate MOSFET; III-V devices; III-V field effect transistors; TFET; electrostatics; subthreshold slope steeper; thin body planar MOSFET; tunneling FET; ultralow power applications; Electrostatics; FETs; Heterojunctions; Indium gallium arsenide; Logic gates; MOSFET circuits; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location
Honolulu, HI
ISSN
0743-1562
Print_ISBN
978-1-4673-0846-5
Electronic_ISBN
0743-1562
Type
conf
DOI
10.1109/VLSIT.2012.6242453
Filename
6242453
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