• DocumentCode
    2643998
  • Title

    An Efficient Event Generation Method for Testing a SOC with Multiple Processing Elements and Associated Peripherals

  • Author

    Bakchowde, Devraj Kallappa ; Nanda, Kishore A. S.

  • Author_Institution
    Nokia Siemens Networks-DC, Bangalore, India
  • fYear
    2010
  • fDate
    13-15 Dec. 2010
  • Firstpage
    15
  • Lastpage
    18
  • Abstract
    For a time invariant system with finite possible events, the possible scenarios are defined by the relative delays between the events. For testing the system, all the nonredundant scenarios need to be generated and utilized. A simple random number generator is inefficient and generates redundant scenarios. In this work, we derive the non-redundant set of scenarios and then propose a method for generating the scenarios efficiently. The provision to control the time granularity of the events is also provided. An example of the method applied for testing a SOC with multiple processing elements and peripherals is given.
  • Keywords
    peripheral interfaces; random number generation; system-on-chip; SOC; associated peripherals; event generation method; event granularity; finite possible event; multiple processing elements; nonredundant scenario; nonredundant set; random number generator; system-on-chip; time invariant system; Delay; Equations; Generators; Mathematical model; Synchronization; System-on-a-chip; Testing; Efficient Event Generation; Embedded System Testing; Multi Events System testing; Multi-Core Testing; Multiprocessor Testing; SOC Testing; Time Invariant System Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification (MTV), 2010 11th International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-409
  • Print_ISBN
    978-1-61284-287-5
  • Type

    conf

  • DOI
    10.1109/MTV.2010.12
  • Filename
    5976211