• DocumentCode
    2644171
  • Title

    Design Challenges at 65nm and Beyond

  • Author

    Kahng, Andrew B.

  • Author_Institution
    California Univ., San Diego, CA
  • fYear
    2007
  • fDate
    16-20 April 2007
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Semiconductor manufacturing technology faces ever-greater challenges of pitch, mobility, variability, leakage, and reliability. To enable cost-effective continuation of the semiconductor roadmap, there is greater need for design technology to provide "equivalent scaling", and for product-specific design innovation (multi-core architecture, software support, beyond-die integration, etc.) to provide "more than Moore" scaling. Design challenges along the road to 45nm include variability and power management, and leverage of design-manufacturing synergies. Potential solutions include "design for manufacturability" bridges between chip implementation and manufacturing know-how
  • Keywords
    design for manufacture; semiconductor device manufacture; system-on-chip; 45 nm; 65 nm; chip implementation; design for manufacturability; design manufacturing synergies; equivalent scaling; power management; product specific design innovation; semiconductor manufacturing technology; variability; Copper; Etching; Fluctuations; Integrated circuit interconnections; Leakage current; Manufacturing; Semiconductor device manufacture; Semiconductor device reliability; Stress; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
  • Conference_Location
    Nice
  • Print_ISBN
    978-3-9810801-2-4
  • Type

    conf

  • DOI
    10.1109/DATE.2007.364505
  • Filename
    4212015