Title :
Task Scheduling for Reliable Cache Architectures of Multiprocessor Systems
Author :
Sugihara, Makoto ; Ishihara, Tohru ; Murakami, Kazuaki
Author_Institution :
ISIT, Fukuoka
Abstract :
This paper presents a task scheduling method for reliable cache architectures (RCAs) of multiprocessor systems. The RCAs dynamically switch their operation modes for reducing the usage of vulnerable SRAMs under real-time constraints. A mixed integer programming model has been built for minimizing vulnerability under real-time constraints. Experimental results have shown that our task scheduling method achieved 47.7-99.9% less vulnerability than a conventional approach
Keywords :
SRAM chips; cache storage; circuit reliability; multiprocessing systems; processor scheduling; SRAM; mixed integer programming; multiprocessor systems; reliable cache architectures; task scheduling; Cache memory; Circuit simulation; Computational modeling; Computer architecture; Multiprocessing systems; Processor scheduling; Random access memory; Single event upset; Switches; System-on-a-chip;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location :
Nice
Print_ISBN :
978-3-9810801-2-4
DOI :
10.1109/DATE.2007.364511
