DocumentCode
2644293
Title
A case for I/O response benchmarking of microprocessors
Author
Martins, Goncalo ; Lacey, Dave ; Moses, Allistair ; Rutherford, Matthew J. ; Valavanis, Kimon P.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Denver (DU), Denver, CO, USA
fYear
2012
fDate
25-28 Oct. 2012
Firstpage
3018
Lastpage
3023
Abstract
The main goal of this paper is to describe a new methodology to evaluate the I/O responsiveness of microprocessors. This addresses the need for benchmarks for real-time systems that measure critical properties for system design that are not currently handled by traditional performance benchmarks. The benchmark developed under this methodology is tested on three microprocessor architectures: ARM, PIC and XMOS. The results of the benchmarks show that the response latency of systems can vary significantly between architectures and under different system loads.
Keywords
microprocessor chips; real-time systems; ARM; I/O response benchmarking; PIC; XMOS; microprocessors; real-time systems; response latency; Benchmark testing; Computer architecture; Cryptography; Embedded systems; Microprocessors; Standards; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society
Conference_Location
Montreal, QC
ISSN
1553-572X
Print_ISBN
978-1-4673-2419-9
Electronic_ISBN
1553-572X
Type
conf
DOI
10.1109/IECON.2012.6389416
Filename
6389416
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