DocumentCode
2644349
Title
Statistical Model Order Reduction for Interconnect Circuits Considering Spatial Correlations
Author
Fan, Jeffrey ; Mi, Ning ; Tan, Sheldon X D ; Cai, Yici ; Hong, Xianlong
Author_Institution
Dept. of Electr. Eng., California Univ., Riverside, CA
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
In this paper, the authors propose a novel statistical model order reduction technique, called statistical spectrum model order reduction (SS-MOR) method, which considers both intra-die and inter-die process variations with spatial correlations. The SSMOR generates order-reduced variational models based on given variational circuits. The reduced model can be used for fast statistical performance analysis of interconnect circuits with variational input sources, such as power grid and clock networks. The SSMOR uses statistical spectrum method to compute the variational moments and Monte Carlo sampling method with the modified Krylov subspace reduction method to generate the variational reduced models. To consider spatial correlations, the authors apply orthogonal decomposition to map the correlated random variables into independent and uncorrelated variables. Experimental results show that the proposed method can deliver about 100times speedup over the pure Monte Carlo projection-based reduction method with about 2% of errors for both means and variances in statistical transient analysis
Keywords
Monte Carlo methods; integrated circuit interconnections; integrated circuit modelling; reduced order systems; statistical analysis; Krylov subspace reduction; Monte Carlo sampling; SS-MOR; inter-die process variations; interconnect circuits; orthogonal decomposition; performance analysis; spatial correlations; statistical spectrum model order reduction; statistical transient analysis; Analytical models; Arithmetic; Circuit simulation; Computational modeling; Integrated circuit interconnections; Measurement; Monte Carlo methods; Polynomials; RLC circuits; Random variables;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364514
Filename
4212024
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