DocumentCode :
2644390
Title :
Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS
Author :
Khakifirooz, A. ; Cheng, K. ; Nagumo, T. ; Loubet, N. ; Adam, T. ; Reznicek, A. ; Kuss, J. ; Shahrjerdi, D. ; Sreenivasan, R. ; Ponoth, S. ; He, H. ; Kulkarni, P. ; Liu, Q. ; Hashemi, P. ; Khare, P. ; Luning, S. ; Mehta, S. ; Gimbert, J. ; Zhu, Y. ; Zhu,
Author_Institution :
IBM Res., Albany, NY, USA
fYear :
2012
fDate :
12-14 June 2012
Firstpage :
117
Lastpage :
118
Abstract :
High-performance strain-engineered ETSOI devices are reported. Three methods to boost the performance, namely contact strain, strained SOI (SSDOI) for NFET, and SiGe-on-insulator (SGOI) for PFET are examined. Significant performance boost is demonstrated with competitive drive currents of 1.65mA/μm and 1.25mA/μm, and Ieff of 0.95mA/μm and 0.70mA/μm at Ioff =100nA/μm and VDD of 1V, for NFET and PFET, respectively.
Keywords :
CMOS integrated circuits; Ge-Si alloys; silicon-on-insulator; ETSOI; NFET; PFET; SiGe; contact strain; engineered extremely thin SOI; high performance CMOS; Epitaxial growth; Logic gates; Performance evaluation; Silicon; Silicon germanium; Strain; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4673-0846-5
Electronic_ISBN :
0743-1562
Type :
conf
DOI :
10.1109/VLSIT.2012.6242489
Filename :
6242489
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2644390
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