DocumentCode :
2644847
Title :
Segmented-channel Si1−xGex/Si pMOSFET for improved ION and reduced variability
Author :
Ho, Byron ; Xu, Nuo ; Wood, Bingxi ; Tran, Vinh ; Chopra, Saurabh ; Kim, Yihwan ; Nguyen, Bich-Yen ; Bonnin, Olivier ; Mazuré, Carlos ; Kuppurao, Satheesh ; Chang, Chorng-Ping ; Liu, Tsu-Jae King
Author_Institution :
Univ. of California at Berkeley, Berkeley, CA, USA
fYear :
2012
fDate :
12-14 June 2012
Firstpage :
167
Lastpage :
168
Abstract :
Segmented-channel Si1-xGex/Si pMOSFETs are fabricated using a conventional process, starting with a corrugated Si1-xGex/Si substrate. As compared with control devices fabricated using the same process but starting with a non-corrugated Si1-xGex/Si substrate, the segmented-channel MOSFETs show better layout efficiency (30% higher ION for IOFF=10 nA per μm layout width) due to enhanced hole mobility, and dramatically reduced dependence of performance on layout width due to the geometrical regularity of the channel region.
Keywords :
Ge-Si alloys; MOSFET; elemental semiconductors; geometry; silicon; Si1-xGex-Si; corrugated substrate; geometrical regularity; hole mobility enhancement; noncorrugated substrate; segmented-channel MOSFET; variability reduction; Fabrication; Layout; Logic gates; MOSFET circuits; MOSFETs; Silicon; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4673-0846-5
Electronic_ISBN :
0743-1562
Type :
conf
DOI :
10.1109/VLSIT.2012.6242514
Filename :
6242514
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2644847
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