DocumentCode
2645096
Title
Accurate chip leakage prediction: Challenges and solutions
Author
Yu, Xiaojun ; Deng, Jie ; Loo, Sim ; Dezfulian, Kevin ; Lichtensteiger, Susan ; Bickford, Jeanne ; Habib, Nazmul ; Chang, Paul ; Mocuta, Anda ; Rim, Ken
Author_Institution
SRDC, IBM, Hopewell Junction, NY, USA
fYear
2012
fDate
12-14 June 2012
Firstpage
191
Lastpage
192
Abstract
A systematic method is proposed to address modeling challenges in accurate chip level leakage prediction, namely a precise total leakage width count method, a simple model to quantify leakage uplift caused by systematic across-chip variation, and a consistent model to capture 3-sigma leakage and leakage spread at fixed performance.
Keywords
integrated circuit modelling; 3-sigma leakage; chip leakage prediction; leakage spread; leakage uplift; modeling challenges; systematic across-chip variation; total leakage width count method; Correlation; Delay; Integrated circuit modeling; Performance evaluation; Predictive models; Stacking; Systematics; IDDQ; Stacking factor; across-chip variation; leakage spread;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location
Honolulu, HI
ISSN
0743-1562
Print_ISBN
978-1-4673-0846-5
Electronic_ISBN
0743-1562
Type
conf
DOI
10.1109/VLSIT.2012.6242526
Filename
6242526
Link To Document