Title :
Multiple behavior module synthesis based on selective groupings
Author :
Yi, Ju-Hwan ; Choi, Hoon ; Park, In-Cheol ; Hwang, Seung Ho ; Kyung, Chong-Min
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Abstract :
In this paper, we present an approach to synthesize multiple behavior modules. Given n DFGs to be implemented the previous methods scheduled each of them sequentially, and implemented them as a single module. Though the method Is appropriate for sharing the functional units, it ignored the following two aspects: (1) different interconnection patterns among DFGs can increase the interconnection area and delay of the critical path, (2) the sequential scheduling of DFGs has a difficulty in considering the effects on the other DFGs not scheduled yet. We show an efficient way to solve the problems using a selective grouping method and the extensions of the traditional scheduling methods. The experimentation reveals that the result obtained by the proposed method is better to reduce interconnection area and to meet the timing constraints than those obtained by the previous methods
Keywords :
VLSI; application specific integrated circuits; circuit CAD; delays; digital signal processing chips; integrated circuit design; integrated circuit interconnections; logic partitioning; timing; ASICs; DFGs; DSP chips; IC design; VLSI; delay; functional units; interconnection area; interconnection patterns; multiple behavior module synthesis; selective grouping method; selective groupings; timing constraints; Application specific integrated circuits; Application specific processors; Computer architecture; Cost function; Delay; Energy consumption; Integrated circuit technology; Kernel; Timing; Very large scale integration;
Conference_Titel :
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-8359-7
DOI :
10.1109/DATE.1998.655886