Title :
Error bound reduction for fixed-width modified Booth multiplier
Author :
Cho, Kyung-Ju ; Lee, Seong-Min ; Park, Seong-Hun ; Chung, Jin-Gyun
Author_Institution :
Dept. of Electron. & Inf. Eng., Chonbuk Nat. Univ., Chonju, South Korea
Abstract :
The maximum error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multiplier. Then, we present a method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is pretty close to that of the multiplier with rounding scheme.
Keywords :
error analysis; multiplying circuits; vector quantisation; W-bit input; W-bit product; error bound reduction; fixed-width modified Booth multiplier; rounding scheme; Encoding; Error analysis; Error compensation; Log periodic antennas; Signal processing;
Conference_Titel :
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on
Print_ISBN :
0-7803-8622-1
DOI :
10.1109/ACSSC.2004.1399184