Embedded power-a multilayer integration technology for packaging of IPEMs and PEBBs

Author

Liang, Zhenxian ; Lee, Fred C. ; Lu, G.Q. ; Borojevic, Dusan

Author_Institution

Center for Power Electron. Syst., Virginia Tech., Blacksburg, VA, USA

fYear

2000

fDate

2000

Firstpage

41

Lastpage

45

Abstract

A packaging integration technology, embedded power, has been developed for fabrication of integrated power electronics modules (IPEMs) and power electronics building blocks (PEBBs). The bare power chips are buried in the ceramic frame and encapsulated with screen-printed dielectric. High-density interconnect metallization between power devices and surface mountable electronics circuitry was fabricated using sputtering and electroplating technologies. Prototype modules have demonstrated the feasibility of this packaging approach

Keywords

ceramic packaging; dielectric thin films; electroplating; encapsulation; interconnections; metallisation; multichip modules; power semiconductor devices; semiconductor device packaging; sputter deposition; IPEMs; PEBBs; bare power chips; ceramic frame; electroplating technology; embedded power multilayer packaging integration technology; encapsulation; high-density interconnect metallization; integrated power electronics modules; packaging; packaging integration technology; power devices; power electronics building blocks; prototype modules; screen-printed dielectric encapsulation; sputtering technology; surface mountable electronics circuitry; Ceramics; Dielectrics; Electronics packaging; Fabrication; Integrated circuit interconnections; Integrated circuit technology; Metallization; Nonhomogeneous media; Power electronics; Sputtering;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Power Packaging, 2000. IWIPP 2000. International Workshop on

Conference_Location

Waltham, MA

Print_ISBN

0-7803-6437-6

Type

conf

DOI

10.1109/IWIPP.2000.885179

Filename

885179