DocumentCode
2646899
Title
Design of a DVP compatible bridge to randomly access pixels of high speed image sensors
Author
Khan, Tareq Hasan ; Wahid, Khan
fYear
2011
fDate
9-12 Jan. 2011
Firstpage
911
Lastpage
912
Abstract
An efficient design of a digital-video-port (DVP) compatible bridge architecture to randomly access image pixels of a high speed image sensor is presented. FPGA synthesis results show that the bridge can support a data rate up to 215 MHz. The design is also synthesized using CMOS 0.18um technology.
Keywords
CMOS image sensors; bridge circuits; field programmable gate arrays; CMOS technology; FPGA synthesis; digital-video-port compatible bridge architecture; frequency 215 MHz; high speed image sensor; randomly access image pixels; size 0.18 mum; Bridges; Field programmable gate arrays; Image sensors; Microcontrollers; Pins; Pixel; Random access memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics (ICCE), 2011 IEEE International Conference on
Conference_Location
Las Vegas, NV
ISSN
2158-3994
Print_ISBN
978-1-4244-8711-0
Type
conf
DOI
10.1109/ICCE.2011.5722933
Filename
5722933
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