Title :
Power-Pro: programmable power management architecture
Author :
Ishihara, Tohru ; Yasuura, Hiroto
Author_Institution :
Dept. of Comput. Sci. & Commun. Eng., Kyushu Univ., Fukuoka, Japan
Abstract :
This paper presents Power-Pro architecture (Programmable Power Management Architecture), a novel processor architecture for power reduction. Power-Pro architecture has following two functionalities: (i) Supply voltage and clock frequency can be dynamically varied. (ii) Active data-path width can be dynamically adjusted to requirement of application programs. For the application programs which require less performance or less data-path width, Power-Pro architecture realize dramatic power reduction
Keywords :
microprocessor chips; parallel architectures; Power-Pro architecture; application programs; clock frequency; power reduction; processor architecture; programmable power management architecture; Circuits; Clocks; Computer architecture; DC-DC power converters; Delay; Energy consumption; Energy management; Frequency; Pipelines; Voltage;
Conference_Titel :
Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
0-7803-4425-1
DOI :
10.1109/ASPDAC.1998.669482