Title :
A jitter measurement circuit based on dual resolution vernier oscillator
Author :
Tang, Wei ; Feng, Jianhua ; Lee, Chunglen
Author_Institution :
Dept. of Microelectron., Peking Univ., Beijing, China
Abstract :
This paper presents a new on-chip jitter measurement circuit based on a dual vernier oscillator (VO) structure. The new structure measures the jitter with a low resolution VO first and then with a high resolution VO, thus greatly expanding the measurement range of the jitter and reducing the test time. The oscillators are implemented with differential digital controlled delay elements, whose oscillation periods can be precisely controlled. The circuit has been implemented and verified with the SMIC 0.18 ¿m technology and has been shown to have the ability of measuring jitters in the pico-second range.
Keywords :
Monte Carlo methods; integrated circuit measurement; integrated circuit testing; timing jitter; dual resolution vernier oscillator; jitter measurement circuit; timing jitter; Circuit testing; Degradation; Delay; Detectors; Digital-controlled oscillators; Jitter; Phase detection; Semiconductor device measurement; Signal resolution; Time measurement; jitter measurement; on-chip; timing jitter; vernier oscillator;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351194
