DocumentCode
2647957
Title
Hierarchical SoC testing scheduling based on the ant colony algorithm
Author
Cui, Xiaole ; Cheng, Wei ; Wang, Xiaoye ; Yin, Liang ; Sun, Yachun ; Zhou, Yan
Author_Institution
Shenzhen Grad. Sch., Key Lab. of Integrated Micorsystems, Peking Univ., Shenzhen, China
fYear
2009
fDate
20-23 Oct. 2009
Firstpage
1221
Lastpage
1224
Abstract
SoC testing scheduling is an NP hard problem, and it is more complex for the hierarchical SoC architecture. By formulating the SoC testing scheduling problem as a 2-D bin-packing model, this paper solves the problem for the hierarchical SoC with the ant colony optimization (ACO) algorithm to reduce testing application time. Experimental results on ITC´02 benchmark circuits show that the ACO algorithm is more effective than earlier proposed methods.
Keywords
circuit testing; optimisation; system-on-chip; 2D bin-packing model; NP hard problem; ant colony algorithm; hierarchical SoC testing scheduling; Ant colony optimization; Circuit testing; Design for testability; Design optimization; Genetic algorithms; Job shop scheduling; NP-hard problem; Scheduling algorithm; Simulated annealing; Sun; Ant Colony Optimization; Hierarchical SoC; Testing scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location
Changsha, Hunan
Print_ISBN
978-1-4244-3868-6
Electronic_ISBN
978-1-4244-3870-9
Type
conf
DOI
10.1109/ASICON.2009.5351198
Filename
5351198
Link To Document