Design methodology and simulation tools for mixed analog-digital integrated circuits

A design methodology and simulation tools are described for mixed analog-digital (A-D) integrated circuits. A generic top-down, bottom-up design methodology is described which allows digital, analog, and mixed A-D portions of the circuit to be specified at various levels ranging from behavioral, functional, cell to transistor level. A model development environment which includes a set of automatic model generators and a model verifier is also described. The simulation environment provides the capability to perform full chip simulation and verification using the unified multilevel mixed-mode simulator MOTIS3/GSIM. While the analog portions of the circuit are simulated with high accuracy, the digital portions can be simulated in various modes. The MOTIS3/GSIM simulator is event driven and uses circuit simulation techniques to provide accuracy for analog portions which may include behavioral analog or mixed A-D models. Examples of its use on two production mixed A-D chips are included