DocumentCode :
2648846
Title :
An introduction to assertion-based verification
Author :
Tao, Yunfeng
Author_Institution :
Comput. Sci. & Eng. Dept., Shanghai Jiaotong Univ., Shanghai, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
1318
Lastpage :
1323
Abstract :
Assertion-based verification is a key methodology to address functional verification challenges. In this paper, we provide an overview of the concepts and the unique benefits of assertion-based verification. Our focus is mostly on the practical aspects of assertion-based verification. We illustrate, with examples, how assertions and coverage properties can be integrated in various stages of a verification process. We also highlight solutions to specific verification problems (e.g. performance or robustness testing) using assertion-based verification methodology.
Keywords :
formal verification; assertion based verification; functional verification; performance testing; robustness testing; verification problem; Clocks; Computer industry; Frequency; Hardware; Logic design; Logic gates; Robustness; Safety; Software engineering; Testing; assertion; hardware verification; linear temporal logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351246
Filename :
5351246
Link To Document :
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