Design of an analog/digital truly random number generator

Author

Espejo, S. ; Martin, J.D. ; Rodriguez-Vázquez, A. ; Huertas, Jose Luis

Author_Institution

AT&T Bell Lab., Murray Hill, NJ, USA

fYear

1990

fDate

1-3 May 1990

Firstpage

1368

Abstract

An analog-digital system is presented for the generation of truly random (aperiodic) digital sequences. This model is based on a very simple piecewise-linear discrete map which is suitable for implementation using monolithic analog sampled-data techniques. Simulation results are given illustrating the optimum choice of the model parameters. Circuit implementations are reported for the discrete map using both switched-capacitor (SC) and switched-current (SI) techniques. The layout of a SI prototype in a 3-μm n-well double-polysilicon double-metal CMOS technology is included

Keywords

CMOS integrated circuits; digital integrated circuits; piecewise-linear techniques; random number generation; switched capacitor networks; 3 micron; MOS VLSI; analog-digital system; aperiodic digital sequences; double-metal CMOS technology; double-polysilicon; model parameters; monolithic analog sampled-data techniques; n-well; piecewise-linear discrete map; random number generator; switched-capacitor; switched-current; Chaos; Circuit testing; Communication switching; Design engineering; Piecewise linear techniques; Random number generation; Sequences; Signal design; Signal generators; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1990., IEEE International Symposium on

Conference_Location

New Orleans, LA

Type

conf

DOI

10.1109/ISCAS.1990.112385

Filename

112385