DocumentCode :
2648983
Title :
An array-processor based architecture for classification problems
Author :
Bellettini, A. ; Ferrari, A. ; Guerrieri, R. ; Baccarani, G.
Author_Institution :
Bologna Univ., Italy
fYear :
1993
fDate :
25-27 Oct 1993
Firstpage :
148
Lastpage :
151
Abstract :
The authors describe the design and implementation of an application-specific digital architecture aimed at the solution in real time of the “K nearest neighbors” algorithm for classification problems, whose computational weight is very high. The system described here is an array-processor architecture in which the data base is split among several units that at the same time apply the same operations to different data stored in local memories. The sustained memory bandwidth of a system featuring 8 units is 2560 Mb/s and it provides a speed-up of 500 times over the software algorithm running on a SUN Sparc2 workstation
Keywords :
application specific integrated circuits; microprocessor chips; parallel architectures; pattern classification; real-time systems; 2560 Mbit/s; K nearest neighbors; array-processor based architecture; classification problems; computational weight; local memories; sustained memory bandwidth; Algorithm design and analysis; Bandwidth; Central Processing Unit; Classification algorithms; Computer architecture; Concurrent computing; Data flow computing; Software algorithms; Sun; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Array Processors, 1993. Proceedings., International Conference on
Conference_Location :
Venice
ISSN :
1063-6862
Print_ISBN :
0-8186-3492-8
Type :
conf
DOI :
10.1109/ASAP.1993.397132
Filename :
397132
Link To Document :
بازگشت