Title :
Synthesizing converters between finite state protocols
Author :
Akella, Janaki ; McMillan, Kyle
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
A general approach for synthesizing inter-process communication devices by adapting labeled transition systems is proposed. An approach is also proposed to generate the finite state machine representing the protocol converter. It is assumed that the data path of the protocol converter is already given. The approach is illustrated by generating the communication process between a four phase master and a two phase slave
Keywords :
computer interfaces; finite automata; protocols; communication process; converter synthesis; data path; finite state machine; finite state protocols; four phase master; inter-process communication devices; labeled transition systems; protocol converter; two phase slave; Automata; Computer architecture; Computer science; Information processing; Observability; Protocols; Timing; Transducers;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
DOI :
10.1109/ICCD.1991.139932