Low-power polygon renderer for computer graphics

Author

Tan, Wee-Chiew ; Meng, Teresa H Y

Author_Institution

Comput. Syst. Lab., Stanford Univ., CA, USA

fYear

1993

fDate

25-27 Oct 1993

Firstpage

200

Lastpage

213

Abstract

Polygon rasterization is the most computational and memory intense stage in rendering synthesized computer images. The authors present a low-power, real-time hardware implementation for this task. Rasterization of two-dimensional Gouraud-shaded polygons at 90,000 polygons/sec is achievable with computational power consumption of about 12 mW at 1.5 V operation, using an array configuration of 16 render engines for a 512 × 512-pixel frame. A transmission format for wireless implementations is proposed with a typical bandwidth of 4 MHz. This screen and format configurable design has potential applications in portable devices, wireless communication and head-mounted display for virtual reality systems

Keywords

parallel processing; real-time systems; rendering (computer graphics); array configuration; bandwidth; computational power consumption; computer graphics; format configurable design; head-mounted display; low-power polygon renderer; polygon rasterization; portable devices; real-time hardware implementation; render engines; synthesized computer images; transmission format; two-dimensional Gouraud-shaded polygons; virtual reality systems; wireless communication; Application software; Bandwidth; Computer displays; Computer graphics; Energy consumption; Engines; Hardware; Pipelines; Rendering (computer graphics); Virtual reality;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-Specific Array Processors, 1993. Proceedings., International Conference on

Conference_Location

Venice

ISSN

1063-6862

Print_ISBN

0-8186-3492-8

Type

conf

DOI

10.1109/ASAP.1993.397145

Filename

397145