Systolic evaluation of functions: Digit-level algorithm and realization

The author presents a novel algorithm for the evaluation of functions. The algorithm is systolic and may be realized as a fully scalable and very regular design consisting of merely full-adders and registers. The algorithm evaluates a polynomial according to the Horner scheme, i.e., it performs a cascade of multiply-and-add operations. Data are represented as two´s complement fixed-point numbers that enters/leaves the operations in a skewed least-significant-digit-first manner making normalization needless. A set of coefficients of the Horner expansion for a small number of functions may be stored in tables and selected systolically digit-by-digit such that the evaluation of different functions may be interleaved. Similarly, a specific rounding-mode may be specified for each operand/function pair, enabling the algorithm to be used for the function evaluation of intervals. The algorithm may be folded and generalized for any radix such that designers may derive their own speed/area ratio in order to fit specific applications. Since the critical path is limited by the latency of a buffered one-digit multiply-and-add operation the algorithm offers a high throughput rate. The author supports this with estimates of the area and the delay for various radices in standard realization