All digital delay-line based ultra wide band transmitter architecture in 0.18μm CMOS

Ultra-Wide Band (UWB) technology has recently become a viable option for wireless applications that require high data-rate and ultra low power demand. This paper presents an all-digital UWB transmitter architecture using 0.18μm CMOS. It employs a delay line based architecture that works with Pulse Positioning Modulation (PPM), On Off Keying (OOK) and Delay Based Binary Phase Shift Keying (DB-BPSK) modulation schemes at two center frequencies (3.75GHz and 4.25GHz) with a fixed bandwidth (500MHz). The proposed transmitter generates a 2ns wide, 120mV peak to peak UWB pulse that satisfies FCC indoor Power Spectral Density requirements and consumes I6.99pJ/pulse that is comparable to state of the art implementations.