DocumentCode :
2649884
Title :
A transparent built-in self-test scheme for detecting single V-coupling faults in RAMs
Author :
Cockburn, Bruce F. ; Sat, Y. F Nicole
Author_Institution :
Dept. of Electr. Eng., Alberta Univ., Edmonton, Alta., Canada
fYear :
1994
fDate :
8-9 Aug 1994
Firstpage :
119
Lastpage :
124
Abstract :
This paper describes a transparent built-in self-test (BIST) scheme for random-access memories (RAMs) that detects single V-coupling faults. Such faults-as defined by Nair, Thatte, and Abraham (1978)-can be used to model many standard fault types such as stuck bits, transition faults, coupling faults, and pattern sensitivities. Variations of the proposed scheme can generate near-deterministic tests for detecting single 2-, 3-, and 4-coupling faults; in addition, probabilistic tests can be generated to detect single V-coupling faults of arbitrary cell multiplicities V⩾2. The BIST scheme uses Nicolaidis´ transformation to make the applied tests transparent; thus the data that was held in the RAM at the start of the test will be restored by the end of the test if no faults are present
Keywords :
automatic testing; built-in self test; fault diagnosis; fault location; integrated circuit testing; random-access storage; RAM testing; built-in self-test scheme; near-deterministic tests; pattern sensitivities; probabilistic tests; random-access memories; single V-coupling faults; stuck bits; transition faults; transparent BIST scheme; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Integrated circuit testing; Random access memory; Read-write memory; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Memory Technology, Design and Testing, 1994., Records of the IEEE International Workshop on
Conference_Location :
San Jose, CA
Print_ISBN :
0-8186-6245-X
Type :
conf
DOI :
10.1109/MTDT.1994.397187
Filename :
397187
Link To Document :
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