• DocumentCode
    2649957
  • Title

    Redundant via allocation for layer partition-based redundant via insertion

  • Author

    Shen, Jian-Wei ; Chiang, Mei-Fang ; Chen, Song ; Guo, Wei ; Yoshimura, Takeshi

  • Author_Institution
    Grad. Sch. of IPS, Waseda Univ., Kitakyushu, Japan
  • fYear
    2009
  • fDate
    20-23 Oct. 2009
  • Firstpage
    734
  • Lastpage
    737
  • Abstract
    The occurrence of via defects increases due to the shrinking size in integrated circuit manufacturing. Redundant via insertion is an effective and recommended method to reduce the yield loss caused by via failures. In this paper, we introduce a redundant via allocation problem for layer partition-based model and solve it using genetic algorithm. The result of layer partition-based model depends on the partition and processing order of layers. With our redundant via allocation, it can be achieved independent of these factors. In our method, we first construct a graph to represent candidate relations between vias and redundant vias, and conflict relations between redundant vias because of design rule violations. Then the connected components of graph are computed. On each component, we can perform redundant via allocation on the boundaries of any layer partition. Genetic algorithm is used to optimize the allocation strategy. Experiment results show that our method can efficiently improve the redundant via insertion rate.
  • Keywords
    design for manufacture; genetic algorithms; integrated circuit design; integrated circuit manufacture; redundancy; design rule violations; genetic algorithm; integrated circuit manufacturing; layer partition-based redundant; optimisation; redundant via allocation problem; via defects; Computational geometry; Conductors; Costs; Genetic algorithms; Integrated circuit interconnections; Integrated circuit manufacture; Integrated circuit yield; Manufacturing processes; Routing; Thermal stresses; Redundant via; design for manufacturability; double via;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2009. ASICON '09. IEEE 8th International Conference on
  • Conference_Location
    Changsha, Hunan
  • Print_ISBN
    978-1-4244-3868-6
  • Electronic_ISBN
    978-1-4244-3870-9
  • Type

    conf

  • DOI
    10.1109/ASICON.2009.5351310
  • Filename
    5351310