Distributed diagnosis for wafer scale systems

The increasing demand for high performance systems has led to the design of systems comprised of a large number of processing elements on a single wafer. This paper presents a distributed diagnosis algorithm for wafer scale systems. Unlike other approaches, the algorithm does not assume diagnostic circuits are fault-free. The algorithm is simple enough to be realized with small circuit overhead. Computer simulation has shown that even for low unit yields, extremely high performance (fault coverage) can be achieved by properly tuning the algorithm parameters