DocumentCode
2650225
Title
Built-in random testing for dual-port RAMs
Author
Yokoyama, Hiroshi ; Tamamoto, Hideo ; Wen, Xiaoqing
Author_Institution
Min. Coll., Akita Univ., Japan
fYear
1994
fDate
8-9 Aug 1994
Firstpage
2
Lastpage
6
Abstract
In this paper, a random testing method for dual-port RAMs to detect double-coupling faults using a BIST scheme is discussed. A double-coupling fault is possibly caused by accessing two cells simultaneously, and is peculiar to dual-port RAMs. Our test method is based on the consideration of geometric locations in double accessing, and it aims at reducing the overhead of a BIST circuit
Keywords
automatic testing; built-in self test; cellular arrays; fault diagnosis; integrated circuit testing; integrated memory circuits; random-access storage; two-port networks; BIST scheme; built-in random testing; cell access; circuit overhead; double accessing; double-coupling faults; dual-port RAMs; geometric locations; test method; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Coupling circuits; Educational institutions; Fault detection; Large scale integration; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design and Testing, 1994., Records of the IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-6245-X
Type
conf
DOI
10.1109/MTDT.1994.397206
Filename
397206
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