DocumentCode :
2650552
Title :
A two-stage wake-up circuit for semi-passive RFID tag
Author :
Chen, Wei ; Che, Wenyi ; Wang, Xiao ; Huang, Chenling ; Yan, Na ; Min, Hao ; Tan, Jie
Author_Institution :
State key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
553
Lastpage :
556
Abstract :
A two-stage wake-up circuit for semi-passive radio frequency identification (RFID) tag is designed and implemented in SMIC 0.18 ¿m CMOS technology. In order to prolong the tag´s battery life, a novel two-stage wake-up strategy with self-calibration is proposed. Measurement results show that the wake-up circuit has no static power and is free of process, voltage and temperature (PVT) variations.
Keywords :
CMOS integrated circuits; radiofrequency identification; radiofrequency integrated circuits; CMOS technology; SMIC; self-calibration; semipassive RFID tag; size 0.18 mum; two-stage wake-up circuit; Batteries; CMOS technology; Circuits; Costs; Inverters; Logistics; RFID tags; Radiofrequency identification; Rectifiers; Threshold voltage; PVT insensitive; Two-stage wake-up strategy; low power; self-calibration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351345
Filename :
5351345
Link To Document :
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