Title :
The Harris video teleconferencing chip set
Author :
Chester, David B.
Author_Institution :
Harris Semiconductor, Melbourne, FL, USA
Abstract :
The hardware portion of the Harris Semiconductor Personal Computer Multimedia System is a five chip set which implements, in conjunction with a host processor and associated software and firmware, a complete H.320 video teleconferencing capability over ISDN 2B lines. The chip set is comprised of a PAL/NTSC video encoder, a PAL/NTSC video decoder, a video codec, a bus interface and audio processor chip, and an audio codec. All five chips in the set are implemented in a 0.5 or 0.6 micron CMOS process. Each of the chips implement digital signal processing algorithms of varying levels of complexity and flexibility. These levels range from standard interpolation and decimation filter implementations found on the audio codec to dual programmable digital signal processor cores found on the bus interface and audio processor chip
Keywords :
CMOS digital integrated circuits; audio coding; digital filters; digital signal processing chips; interpolation; microcomputer applications; multimedia communication; speech codecs; system buses; teleconferencing; video codecs; video coding; 0.5 micron; 0.6 micron; CMOS process; H.320 video teleconferencing; Harris Semiconductor; Harris video teleconferencing chip set; ISDN 2B lines; PAL/NTSC video decoder; PAL/NTSC video encoder; Personal Computer Multimedia System; audio codec; audio processor chip; bus interface; decimation filter; digital signal processing algorithms; dual programmable DSP cores; firmware; host processor; interpolation filter; software; video codec; CMOS process; Decoding; Digital signal processing chips; Hardware; ISDN; Microcomputers; Microprogramming; Multimedia systems; Teleconferencing; Video codecs;
Conference_Titel :
Southcon/96. Conference Record
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-3268-7
DOI :
10.1109/SOUTHC.1996.535136
