A constant-gain time-amplifier with digital self-calibration

This paper presents a closed-loop time-amplifier (TA) with a novel self-calibration technique by adjusting the output capacitance of the conventional TA. The gain of the TA is stabilized, with an input of 0.05~1 T_d (one buffer delay), over a large process-voltage-temperature (PVT) variation: from SS to FF process corner, +/-10% supply voltage, and -40 to 80°C. The proposed TA is designed with SMIC 0.18-¿m mixed-signal CMOS process. Simulation results show that the gain deviation of TA is well controlled within 0.35% under all circumstances, with regard to the gain in typical PVT condition, and the whole circuit consumes 600 ¿A with an input signal of 40 MHz.