A nonlinear phase frequency detector for fast-lock phase-locked loops

A new nonlinear phase frequency detector (PFD) is presented in this paper. When the phase error is not less than ¿, the proposed PFD has a constant output and so a nonlinear gain to accelerate the lock acquisition of a phase-locked loop (PLL); when the phase error is less than ¿, the proposed PFD has a linear gain just like the conventional PFD to make the PLL maintain a proper loop bandwidth for low output jitter. A circuit embodiment of the proposed PFD, which uses the same amount of transistors as the conventional PFD circuit does, is also presented. Circuit simulation results show that the proposed PFD circuit accelerates the lock acquisition of a test bench PLL by about 20% and achieves an operating frequency ranging from 1 MHz to 2 GHz.