Fabrication and characterization of Si/SiGe quantum dots with capping gate

Author

Kodera, Tetsuo ; Fukuoka, Yuji ; Takeda, Kenta ; Obata, Toshiaki ; Yoshida, Katsuharu ; Sawano, Kentaro ; Uchida, Ken ; Shiraki, Yasuhiro ; Tarucha, Seigo ; Oda, Shunri

Author_Institution

Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan

fYear

2012

fDate

10-11 June 2012

Firstpage

1

Lastpage

2

Abstract

We study transport properties of quantum point contacts (QPCs) and quantum dots (QDs) with a global capping gate, fabricated on a Si/SiGe high electron mobility transistor (HEMT) wafer. By biasing the capping gate negatively, we succeed in making QPC operation point of surface Schottky gate negatively smaller and then reducing noise. We also observe Coulomb oscillations using a QD structure by suppressing charging noise with negative capping gate voltage.

Keywords

Ge-Si alloys; elemental semiconductors; high electron mobility transistors; noise; quantum point contacts; semiconductor quantum dots; silicon; Coulomb oscillations; HEMT wafer; QD structure; QPC operation point; Si-SiGe; charging noise; global capping gate; high electron mobility transistor; high electron mobility transistor wafer; negative capping gate voltage; noise; quantum dots; quantum point contacts; surface Schottky gate; transport properties; HEMTs; Logic gates; MODFETs; Silicon; Silicon germanium; Voltage control; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Nanoelectronics Workshop (SNW), 2012 IEEE

Conference_Location

Honolulu, HI

ISSN

2161-4636

Print_ISBN

978-1-4673-0996-7

Electronic_ISBN

2161-4636

Type

conf

DOI

10.1109/SNW.2012.6243291

Filename

6243291