DocumentCode
2652254
Title
Radiation effects upon the mismatch of identically laid out transistor pairs
Author
Verbeeck, Jens ; Leroux, Paul ; Steyaert, Michiel
Author_Institution
Dept. ESAT-MICAS, Katholieke Univ. Leuven, Leuven, Belgium
fYear
2011
fDate
4-7 April 2011
Firstpage
194
Lastpage
197
Abstract
This paper presents the DC behavior of transistors with finger layout and with gate enclosed layout in a 0.18μm CMOS technology under the influence of gamma-radiation. The threshold voltage shift and the drain current mismatch before and after irradiation has been investigated up to a total ionizing dose of 100kGy.
Keywords
CMOS integrated circuits; MOSFET; gamma-rays; integrated circuit layout; radiation hardening (electronics); CMOS technology; DC behavior; drain current mismatch; finger layout; gamma-radiation; gate enclosed layout; radiation effects; size 0.18 mum; threshold voltage shift; transistor pairs; CMOS integrated circuits; Layout; Logic gates; MOSFETs; Radiation effects; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures (ICMTS), 2011 IEEE International Conference on
Conference_Location
Amsterdam
ISSN
1071-9032
Print_ISBN
978-1-4244-8526-0
Electronic_ISBN
1071-9032
Type
conf
DOI
10.1109/ICMTS.2011.5976845
Filename
5976845
Link To Document