• DocumentCode
    2652583
  • Title

    Self-improvement of cell stability in SRAM by post fabrication technique

  • Author

    Kumar, Anil ; Saraya, Takuya ; Miyano, Shinji ; Hiramoto, Toshiro

  • Author_Institution
    Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2012
  • fDate
    10-11 June 2012
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    The post fabrication technique for self-improvement of SRAM cell stability is validated by experiment using 1k DMA SRAM TEG array. It is shown that the stability of unbalance cells is automatically improved by merely applying stress voltage to VDD terminal. The mechanism of the phenomena is also analyzed by measuring VTH of all transistors before and after stress and it is newly found that |VTH| of weaker PFET in the cell is selectively lowered by the self-improve mechanism.
  • Keywords
    SRAM chips; field effect transistors; 1k DMA SRAM TEG array; PFET; SRAM cell stability; post fabrication technique; self-improve mechanism; self-improvement; stress voltage; Correlation; Fabrication; Random access memory; Stability analysis; Stress; Thermal stability; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Silicon Nanoelectronics Workshop (SNW), 2012 IEEE
  • Conference_Location
    Honolulu, HI
  • ISSN
    2161-4636
  • Print_ISBN
    978-1-4673-0996-7
  • Electronic_ISBN
    2161-4636
  • Type

    conf

  • DOI
    10.1109/SNW.2012.6243348
  • Filename
    6243348
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2652583