DocumentCode
2652805
Title
Comparing fast implementations of bit permutation instructions
Author
Hilewitz, Yedidya ; Shi, Zhijie Jerry ; Lee, Ruby B.
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Volume
2
fYear
2004
fDate
7-10 Nov. 2004
Firstpage
1856
Abstract
Recently, a number of candidate instructions have been proposed to efficiently compute arbitrary bit permutations. Among these, GRP is the most attractive, having utility for other applications in addition to permutation such as sorting and having good inherent cryptographic properties. However, the current implementation of GRP is the slowest of the candidates; BFLY, on the other hand, is the fastest. In this paper, we examine the possibility of executing GRP on a butterfly or an inverse butterfly network.
Keywords
cryptography; hypercube networks; arbitrary bit permutations; bit permutation instructions; butterfly network; cryptographic properties; Circuits; Computer aided instruction; Cryptography; Decoding; Delay; Hardware; Impedance; Microprocessors; Registers; Sorting;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on
Print_ISBN
0-7803-8622-1
Type
conf
DOI
10.1109/ACSSC.2004.1399486
Filename
1399486
Link To Document