Complexity and performance of computational arrays

The authors use a case study to analyze the tradeoffs between speed and complexity in systolic array operation. First, a theoretical lower bound for performance is established. The use of currently available systolic arrays is considered. These arrays feature advanced characteristics such as nonplanar interconnections and multimode processing elements The arrays are provided with additional features to increase computational speed. The best performance obtained is still inferior to the theoretical optimum. To complement the study, the requirements of an architecture to achieve optimal performance are established.<>