Design and FPGA implementation of JAVA CARD coprocessor for EMV compatible IC bankcard

To meet the urgent need of transferring magnetic stripe bankcard to IC bankcard, a 16-bit low power JAVA CARD coprocessor for EMV compatible IC bankcard is designed and implemented by FPGA. In order to speed up the running of the JAVA CARD applets, a novel 5-stage pipelined JAVA CARD coprocessor is achieved with pure logic circuits, which carries out the execution of 88 instructions out of 134 defined in the JAVA CARD Virtual Machine Specification 3.0 Classic Edition, while the remaining instructions are processed by the main 32-bit RISC processor. A pre-fetch instruction buffer and stack-top-register are used to ensure the fluency of the pipeline for accelerating the coprocessor. The design is verified to be feasible for the need of IC bankcard by FPGA and proved significantly faster than the regular software virtual machine, while remaining in a low power consumption level.