Low-power realization of FIR filters using current-mode analog design techniques

Author

Srinivasan, Venkatesh ; Rosen, Gail ; Hasler, Paul

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

Volume

2

fYear

2004

fDate

7-10 Nov. 2004

Firstpage

2223

Abstract

This work demonstrates the feasibility of low-power analog FIR filters using current-mode techniques. Preliminary results from the proposed filter indicate a power consumption that is much lower than alternate digital implementations at 20MSPS making it attractive for portable applications. The FIR filter comprises of a current-mode sample-and-hold configured as a delay element followed by an analog multiplier. Results from an 8-tap linear phase filter and a 16-tap non-linear phase filter are shown to match well with the ideal filter responses.

Keywords

FIR filters; analogue processing circuits; current-mode circuits; linear phase filters; 16-tap nonlinear phase filter; 8-tap linear phase filter; FIR filters; analog multiplier; current-mode analog design techniques; filter responses; power consumption; CMOS process; Delay; Digital filters; Energy consumption; Finite impulse response filter; Matched filters; Nonlinear filters; Power dissipation; Signal processing; Switched capacitor circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on

Print_ISBN

0-7803-8622-1

Type

conf

DOI

10.1109/ACSSC.2004.1399562

Filename

1399562